2 days old
2018-07-192018-08-18

Senior Staff Design Engineer

Xilinx
San Jose, CA
  • Job Code
    155147
Job Title: Senior Staff Design Engineer 155147

Primary Location United States-California-San Jose
Job: Design Engineering
Schedule: Full-time
Description

Xilinx develops highly flexible and adaptive processing platforms that enable rapid innovation across a variety of technologies - from the endpoint to the edge to the cloud. Xilinx is the inventor of the FPGA, hardware programmable SoCs and the ACAP (Adaptive Compute Acceleration Platform), designed to deliver the most dynamic processor technology in the industry and enable the adaptable, intelligent and connected world of the future in a multitude of markets including Data Center (Compute, Storage and Networking); Wireless/5G and Wired Communications; Automotive/ADAS; Emulation & Prototyping; Aerospace & Defense; Industrial Scientific & Medical, and others. Xilinx's core strengths simultaneously address major industry trends including the explosion of data, heterogeneous computing after Moore's Law, and the dawn of artificial intelligence (AI).

Our global team is growing and we are looking for bold, collaborative and creative people to help us lead the industry transformation to build an adaptable intelligent world. We believe that by embracing diverse ideas, striving for excellence in all that we do, and working together as a unified team, we can accomplish anything. Come do your best work and live your best life as part of the ONEXILINX team! 


Design Requirements Assessment

  • Provides in-field assistance to marketing to ensure accurate understanding of customer requirements by acting as subject-matter expert, and leading technical discussions/presentations.
  • Where requested, collaborates with marketing to explore requirements directly with customers and ensures that requirements translate accurately into design specifications
  • Assesses the technical feasibility of a product requirement (PDD/RS))
  • Determines the best path forward for addressing customer and product requirements cost-effectively (e.g., existing routines, work-arounds, schedules, or alternative strategies) (PDD/RS)
  • Ensures that requirements translate accurately into design specifications (PDD/RS)


Design Implementation

  • Fully understands the implications of software on hardware design decisions
  • Effectively exercises full design implementation capabilities
  • Creates and tracks product development schedules and manages internal (e.g., Quality, CAD) and external IP vendor relationships
  • Leads peer reviews of proposed design architectures and verification results to ensure useful, accurate, and timely feedback to stakeholders
  • Actively demonstrates the standards and group values at the core of quality implementation
  • Mentors less experienced design engineers in implementation tasks to ensure compliance to specification, quality standards, and milestones
  • Exercises program leadership to ensure accurate version tracking and control, and effective configuration management
  • Applies advanced understanding of process technology, circuit simulation, and architectural modeling to address design implementation challenges
  • Networks professionally and interfaces effectively with industry forums to identify design engineering practices of potential benefit to Xilinx
  • Modifies architecture as needed to achieve solutions that meet customer requirements

Design Process and Methodology

  • Collaborates with design management and other engineering teams in identifying and addressing key areas where changes or the adaptation of methods is required to better align with Xilinx's needs
  • Reviews proposed changes in methods to determine their appropriateness and feasibility
  • Works with other engineering organizations and external entities to develop best-in-class design flow practice and methods.
  • With customers and marketing, develops quality guidelines, translating them into metrics and solutions.

Iterative Component Verification and Validation

  • Supports Test Engineering in the setting up of valid test verification criteria and plans at the system level
  • Creates and tracks schedules to ensure that component deliveries achieve technical and quality objectives per specifications in a timely manner
  • Ensures seamless component integration, device manufacturability, and sign-off acceptability based on formal verification test data
  • Mentors less experienced design engineers and leads experienced verification engineers in verification testing

Process Adaptation and Optimization

  • Reviews proposed changes in methods to determine their appropriateness and feasibility
  • Leads junior design engineers on emerging methods and how best to integrate these into practice

Verification and Validation

  • Creates verification plans at the system level
  • Mentors less experienced design engineers in verification testing and the appropriate exercising of component innovations and/or the functionality desired by customers
  • Creates and tracks schedules to ensure that component deliveries achieve technical and quality objectives per specifications in a timely manner
  • Develops or reviews test plans, and works with verification engineers to design test methodologies that ensure the achievement of block quality
  • Keeps up to date with industry best practices in verification and validation tools
  • Recommends and leads the development of verification infrastructure and environments

Design Enablement (Tools/System/Practice)

  • Exercises technical innovation in the use of standard design implementation tools and methods (e.g., circuit techniques)
  • Actively explores innovative design implementation tools or methods or their impact on implementation design practices (e.g., process excursions, boundary excess, signal passing of different voltages)
  • Stays current with and proposes the internal use of industry approaches, algorithms, and practices
  • Expert in technical innovation in the use of standard design implementation tools and methods (e.g. understands how to leverage the tool to have a positive impact on the design).
  • Aggregates and provides inputs to tool developers and vendors on issues to improve the tools.
  • Actively explores innovative design implementation tools or methods and their impact on implementation design practices and makes recommendations for tool acquisition (e.g., OVM and Questa)
  • Stays current with and proposes the internal use of industry approaches, algorithms, and practices (e.g. state of the art DSP algorithms).
  • Proposes the solution of FPGA-specific problems with tool vendors.

Requirements Assessment

  • Analyzes customer problems, identifying gaps in our product definition
  • Assists FAEs and customers with technical presentations and troubleshooting
  • Considers product costs, schedule impacts and risk when evaluating feature requests
  • Evaluates 3rd party IP against requirements
  • Performs competitive analyses to ensure best in class features


Qualifications

Education Requirements

 

MS EE  or BS EE

Years of Experience

 

10 years of working experience in relevant area  

 

  • High-speed memory architecture including control and data path, memory cell margin and timing optimization.
  • Circuit design tools and simulators (such as SPICE, Virtuoso etc).
  • STA tool like Prime Time, Nano Time for timing closure
  • Power, Performance and area optimization.
  • Good understanding of FinFET technology and device/circuit operation
  • Work with layout designer for optimal layout implementation using custom/semi-custom/automated flow
  • Silicon debug, yield analysis and putting chips into production
  • Knowledge of Design Compiler and ICC2 is highly desirable
  • Knowledge of RTL and functional verification is highly desirable
  • Knowledge of FPGA is plus
  • Scripting languages to improve productivity
  • UNIX environment.

Job Posting: Apr 12, 2018, 10:46:06 AM

Xilinx is an equal opportunity and affirmative action employer. Applicants and employees are treated throughout the employment process without regard to race, color, religion, national origin, citizenship, age, sex, marital status, ancestry, physical or mental disability, veteran status, gender Identity or sexual orientation. The self-identification information requested is not gathered for employment decisions. It is used only for compliance with US Federal laws. Your responses are strictly voluntary, and any information provided will remain confidential. If you choose not to "self-identify", you will not be subject to any adverse treatment.

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Senior Staff Design Engineer

Xilinx
San Jose, CA

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San Jose, CA

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