6 hours

Senior Design Engineer 1

  • Job Code
Job Title: Senior Design Engineer 1 154618

Primary Location Singapore-Singapore-Singapore
Job: Hardware Engineering
Schedule: Full-time
Xilinx is seeking a Senior analog Design Engineer. This engineer will become a part of the advanced technology development team and will focus on state-of-the-art wireline transceiver development. The engineer will focus on design of PLL, Transmitter, and Receiver blocks for low power and high performance, for embedding into leading edge FPGAs. Additional responsibilities include simulation coverage for optimization and ensuring robustness to process variations and secondary process effect.

Education Requirements
Bachelor/Masters/Phd Degree in Electronic Engineering with excellent results
Demonstrated outstanding academic performance in circuit, logic design and analysis and IC design related courses

Years of Experience
Minimum 3 years of experience in designing high speed analog circuits.

Job Posting: Feb 28, 2018, 8:36:38 PM

Xilinx is an equal opportunity and affirmative action employer. Applicants and employees are treated throughout the employment process without regard to age, race, gender, religion, marital status and family responsibilities, disability or sexual orientation.


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