4 hours
2018-05-212018-06-20

Design Engineer 1

Xilinx
  • Job Code
    155105
Job Title: Design Engineer 1 155105

Primary Location India-India-Hyderabad
Job: Design Engineering
Schedule: Full-time
Description
Xilinx is the leading provider of All Programmable FPGAs, SoCs, MPSoCs and 3DICs. Xilinx's all-programmable devices are designed into tens of thousands of products that improve the quality of the everyday lives of billions of people worldwide. For over 30 years, Xilinx has been behind some of the greatest advancements in technology and science - from the industry's first fabless semiconductor model to the NASA Curiosity Mars Rover, to today's autonomous vehicles and hyperscale data centers. Xilinx uniquely enables applications that are both software-defined, yet hardware optimized - enabling smart, connected and differentiated applications across technology's biggest megatrends, including Machine Learning, 5G Wireless, Embedded Vision, Industrial IoT and Cloud Computing and more.

If you are a passionate, innovative and an out-of-the-box thinker that enjoys challenging projects, Xilinx is the right place for you. Our global team is growing and we are looking for bold, collaborative, and creative people to help deliver groundbreaking technologies that enable our customers to differentiate. Come do your best work and live your best life through collaboration, wellness and giving back to your community as a member of the ONEXILINX team.


JD :

Candidate should be have in-depth knowledge of the Verilog. He should have done RTL design for SRAM blocks, FIFO, Error correcting codes, interconnect.
As a Design Engineer he should be able to code the RTL and contribute to verification effort for the team. Good communication skill is required  interacting peers with cross site as well.






Qualifications
BS with 4   years in Electrical Engineering, Computer Engineering, or Computer Science. Experienced with development of UVM, OVM, VMM and/or System Verilog, Verilog test benches and usage of simulation tools/debug environments like Synopsys VCS, Cadence IES to test full chip SOCs and FPGAs. 
Should have good aptitude and analytical and problem solving skills.
Knowledge of SRAM and interconnect is a plus.

Job Posting: Apr 10, 2018, 5:03:26 AM


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