1 day old
2017-12-102018-01-09

Digital IC design engineer (ASIC)

ASML
San Jose, CA
  • Job Code
    12540-130843#13061716
Company ASML

Job Title: Digital IC design engineer (ASIC)

JobID: 12540-130843#13061716

Location: San Jose, CA, 95115, USA

Description: ## Introduction

Would you like to be part of the latest E-beam metrology equipment development for semiconductor applications? We are looking for a digital IC design engineer to be responsible for engineering of analog and digital components of the E-beam metrology tool.

## Job Mission

Hermes Microvision, Inc. (HMI), an ASML company, is a leading supplier of advanced E-beam inspection and pattern verification systems used for advanced semiconductor devices. HMI has multiple years of e-beam application experience and leadership in semiconductor factories, focused on high resolution and voltage contrast imaging. As part of ASML, HMI will boost ASML’s holistic lithographic portfolio of (i) lithography exposure systems, (ii) computational lithography and (iii) metrology. Between these three cornerstones ASML offers application products for process window enhancement, control and detection. As part of our team, you will have the opportunity to go beyond yourself in developing more advanced techniques and pushing the boundaries of technology.

## Job Description



* Work with partners on the design process of the digital components.

* Together with the design engineering team from the partners, identify design solutions for the specifications of the module / function.

* Conduct schematic level, layout level verification of the designs.

* Work closely with the partner to conduct function / performance tests and verification after tape out.

* Support the sub-system level integration.

* Generate and / or review related IP documents.

## Education

Ph.D. with 2+ years of hands-on experiences, or master with 5+ years hands-on experiences, or bachelor with 8+ years hands-on experiences, in electrical engineering. Hands-on experiences of analog IC design, layout, verification, tape out, and testing. Familiar with Bipolar, CMOS, and BiCMOS process. The successful candidate should be a team player and should have self motivation, initiative, dedication, and strong communication skills. The candidate should also have the following specific skills or experiences.

## Personal skills



* CPLD and FPGA IC design, layout, verification, tape out and test

* Micro controller IC design, layout, verification, tape out and test

* High speed SerDes design, layout, verification, tape out and test

* High speed optical fiber transceiver IC design, layout, verification, tape out and test

* High speed clock distribution and deskew IC design, layout, verification, tape out and test



*Location:* San Jose - CA, US


*Level:* Bachelor


*Experience:* 5-10 Experienced


*Available since:* 2017-09-05


*Functional area:* Industrial Engineering


*Background:* Electronics


*Reference:* US03347



Categories

  • Engineering

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Digital IC design engineer (ASIC)

ASML
San Jose, CA

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Digital IC design engineer (ASIC)

ASML
San Jose, CA

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